`define isISE 1
`define isDDR3 1
`define isSDRAM32bit 1
`define isXC6SLX25 1
`define CY7C68013A 1
`define SPIROM 1
`define DEBUG_INS_BUS 1

//`define CACHE_TOTAL_SIZE_3D 11 /*16k*/
`define CACHE_TOTAL_SIZE_3D 10 /*8k*/
//`define CACHE_TOTAL_SIZE_3D 9 /*4k*/
